The present invention relates to an integrated circuit bypass capacitor with reduced leakage current and power-down control.
Advances in semiconductor technology have resulted in powerful, yet small appliances for mobile applications. To ensure long operation, minimizing power dissipation is important. For portable electronic devices this equates to maximizing battery life. For example, mobile phones need to be powered for extended periods (known as standby mode, during which the phone is able to receive an incoming call), but are fully active for much shorter periods (known as talk or active mode, while making a call). When an electronic device such as a mobile phone is in standby mode, certain portions of the circuitry within the electronic device, which are active when the phone is in talk mode, are shut down. These circuits, however, still dissipate power consumption through leakage currents, even though they are inactive. Even if the leakage current is much smaller than the normal operating current of the circuit, the leakage current depletes the battery charge over the relatively long standby time, whereas the operating current during talk time only depletes the battery charge over the relatively short talk time. As a result, the leakage current has a disproportional effect on total battery life, making leakage current an important design constraint.
One common component used in discrete as well as IC circuits is a bypass capacitor. The bypass capacitor is generally employed to conduct an alternating (AC) current around a component or group of components. The bypass capacitor provides a short circuit pass for high-frequency AC components and allows only the DC component pass through the bypassed component. These capacitors are widely used on analog and digital chips. For most such applications, having a solid constant DC voltage as a power supply or bias is essential. Any variations and fluctuations on the supply or bias voltages cause issues for operation of most analog and digital blocks. This is especially true for analog blocks, where any such unwanted fluctuations or variations can cause major disruptions in the operation of the circuit. Such variations and fluctuations can be effectively filtered using bypass capacitors. These capacitors dampen the fluctuations as AC components and provide the required filtering effect which helps keep the voltages across the chip constant, minimizing the effects of fluctuations and noise.
One sensitive node (especially for analog blocks) is the voltage supply. Usually analog blocks are very sensitive to variations and noise on the voltage supply. Although in differential circuits this sensitivity is reduced, proper performance for many circuits depends on having a clean supply voltage VDD. Similarly digital and mixed signal circuits are dependent on a clean supply, especially for high frequency circuits where timing issues become of essence.
To provide a clean power supply for analog and digital components, one common practice is to cover all unused space on the chip around each individual block with bypass capacitors for the supply voltage. To maximize the area efficiency of the bypass capacitors, they are commonly implemented using metal oxide semiconductor (MOS) capacitors (MOSCAPs). These capacitors are implemented as transistors and take advantage of gate oxide of MOS devices.
Unlike metal-insulator-metal (MIM) capacitors and metal-on-metal (MOM) caps, the MOSCAP is highly non-linear with voltage and has more variability with process and temperature. The main advantage of MOSCAP is its high area density, which makes is most suitable for bypass purposes. Bypass capacitors are usually across constant voltage levels and the variations and exact capacitor values become less significant. Rather, a high capacitance is the main objective. For example, modern chips typically use bypass capacitance on the order of at least a few hundred pico-farads to a few nano-farads. As a result, the area efficiency of bypass capacitors dictates their implementation as MOSCAPs.
In modern deep sub-micron CMOS technology, however, the use of MOSCAPs as bypass capacitors can cause increased leakage and high power dissipation even if the chip is not running. As the gate oxide thickness decreases, the leakage across the gate oxide becomes more significant. The large size of the required bypass capacitor means that the capacitor needs to be implemented as a large transistor, where the gate leakage becomes even more significant. This is especially true at high voltage and high temperature. The leakage current through bypass capacitors becomes especially important in the power-down mode.
In the power-up mode where all the blocks are on, the main current consumption is dominated by the actual power consumption of such blocks. In the power-down mode, these blocks should be in the inactive or off state and the current consumption should be low. The leakage current, however, stays constant. Therefore, it can potentially become the dominant component in the power-down current of the IC.
Thus, reducing the leakage current of bypass capacitors becomes essential in modern semiconductor devices. One solution uses high-voltage devices which are usually available in the sub-micron processes for input/output purposes. These devices however do not have the low gate oxide thickness of the core devices and therefore have lower area density for providing a similar amount of bypass capacitance.